Improved performance of Ge n+/p diode by combining laser annealing and epitaxial Si passivation
Wang Chen1, †, Xu Yihong2, Li Cheng3, Lin Haijun1
Fujian Provincial Key Laboratory of Optoelectronic Technology and Devices, School of Opto-electronic and Communiction Engineering, Xiamen University of Technology, Xiamen 361024, China
Xiamen Institute of Technology, Xiamen 361024, China
Department of Physics, Semiconductor Photonics Research Center, Xiamen University, Xiamen 361005, China

 

† Corresponding author. E-mail: chenwang@xmut.edu.cn

Abstract

A method to improve Ge n+/p junction diode performance by excimer laser annealing (ELA) and epitaxial Si passivation under a low ion implantation dose is demonstrated. The epitaxial Si passivation layer can unpin the Fermi level of the contact of Al/n-Ge to some extent and reduce the contact resistance. In addition, the fabricated Ge n+/p junction diode by ELA plus epitaxial Si passivation exhibits a decreased reverse current density and an increased forward current density, resulting in a rectification ratio of about 6.5×106 beyond two orders magnitude larger than that by ELA alone. The reduced specific contact resistivity of metal on n-doped germanium and well-behaved germanium n+/p diode are beneficial for the performance improvement of Ge n-MOSFETs and other opto-electronic devices.

1. Introduction

Germanium is a promising alternative channel material for the extremely downscale complementary metal oxide semiconductor (CMOS) technology due to its higher carrier mobility and lower processing temperature compared to silicon (Si).[1,2] Significant progress has been made in p-MOSFETs, while for n-MOSFETs there are still some hindrances.[3,4] One of them is the large parasitic resistance in source/drain,[5] which is dominated by the contact resistance in ultrascaled CMOS and required to be addressed for enhancing the current drive capability.[68] However, ohmic contact to n-Ge with low resistivity is difficult to achieve. On one hand, the low n-type dopant solid solubility and high diffusivity result in poor dopant activation and large junction depth. On the other hand, the Fermi level at the metal/Ge contact interface is fixed to the valance band edge of Ge irrespective of the metal, which results in a high electron Schottky barrier height (SBH).[9] In addition to the large parasitic resistance, typical Ge n+/p junctions formed by conventional implantation also suffer from implantation-induced damage and a large number of defects on the Ge surface evaluated as the interface trap density that causes high reverse junction leakage[10] and may cause charge trapping near the source/drain (S/D) junctions.[11]

Several approaches have been proposed to reduce the contact resistance to n-Ge, such as the suppression of the Fermi-level pinning by the introduction of ultrathin SiN[12] and Ge3N4[13] layers or by epitaxial Si passivation.[14] The specific contact resistivity ( was reduced to by using a Si interfacial layer.[14] Alternatively, Sb δ-doping,[15] dopant segregation during Ni germanidation,[16,17] and excimer laser annealing (ELA)[18,19] were used to obtain high doping concentrations and ohmic contacts. Compared with other annealing methods, such as furnace annealing,[20] rapid thermal annealing (RTA),[21] millisecond flash annealing,[22] micro wave annealing,[23] ELA has its unique advantages:[24] the laser pulse duration is extremely short (25 ns), resulting in less dopant diffusion and loss; its annealing temperature can be up to materials’ melting point, which makes sure enough activation of the implanted dopants occurs; it is a meta-stable process, allowing an active dopant concentration beyond the solubility limit. Furthermore, it has been proved to be very efficient for healing ion implantation damages. ELA is a very promising annealing method to achieve a higher n-type doping concentration, a lower contact resistance, as well as the defect-free ion implanted-Ge.[18,19]

In this paper, we demonstrate a method to improve Ge n+/p junction diode characteristics by the combination of ELA and epitaxial Si passivation under a low ion implantation dose. It is observed that the epitaxial Si passivation layer could unpin the Fermi level to some extent and reduce the contact resistance. A better-behaved Ge n+/p junction diode has been achieved by ELA with epitaxial Si passivation.

2. Experiment

A Ga-doped p-type Ge(100) wafer with a resistivity of (doping concentration of was used as a substrate. The Ge wafer was circularly degreased in an ultrasonic bath of acetone and ethanol, immersed in hydrofluoric acid solution (HF: H2O = 1: 50) to remove the native oxide, rinsed with deionized water, and then finally blown dry by nitrogen. Prior to ion implantation, a 15 nm SiO2 film was deposited on the Ge surface by plasma-enhanced chemical vapor deposition. Phosphorus was implanted at energy of 10 keV and low dose of . Before performing any annealing process, the SiO2 on the surface was removed using concentrated hydrofluoric acid HF at room temperature (25 °C) and then rinsed in deionized water for 10 min to remove the surface native oxide layer, which is supposed to act as an oxygen contaminant source during the post-implantation ELA process on Ge implanted with B.[22,24] One-pulse laser annealing with laser energy density of 150 mJ/cm2 was performed in ambient nitrogen using a 248 nm KrF excimer laser with a pulse duration of 25 ns. The laser spot size was 4 mm×3 mm, and continuous stepping in X and Y directions was carried out to cover the whole sample. Then, the samples were cleaned with diluted hydrofluoric acid, and loaded into the UHVCVD chamber. After a 400 °C–10 min bake, a high quality Si layer with several-monolayer-thick was grown on the samples using disilane (Si2H6) with a flow rate of 1 sccm as the precursor at 390 °C in 10 min.[25,26] The patterns of Al contacts to n+-Ge for circular transmission line measurements (CTLM) and Ge n+/p junction diodes with a 100- -diameter mesa were defined by standard photolithography and dry/wet etching with oxide hard masks. A 300 nm Al film was sputtered on the backside of the Ge wafer as the other electrode. For comparison, the contact of Al/n+-Ge and Ge n+/p diode without epitaxial Si passivation layer was also fabricated.

3. Results and discussion

A Si passivation layer must be thick enough to passivate the Ge surface, on the other hand, it must be sufficiently thin to minimize the effect on series resistance and defect generation during growth. The optimal thickness has been proved to be a few monolayers.[12,13] Furthermore, the Ge surface roughness has a great influence on the leakage current of the device. The surface morphologies of the laser annealed samples before and after Si passivation were characterized by atomic force microscopy (AFM), as shown in Fig. 1. It can be seen that the root-mean-square (RMS) surface roughness of the samples before and after Si passivation is 0.16 nm and 0.17 nm, respectively. The surface is very smooth for all the samples, which meets the request of the device’s preparation. The ex situ x-ray photoelectron spectroscopy (XPS) spectra of the samples with Si passivation are shown in Fig. 2. From Fig. 2(a), we can see Si 2p peak coming from elemental Si and SiO2, which confirms the coverage of Si layer on the Ge surface. Moreover, the thickness of the Si layer was determined to be from the attenuation of the Ge 3d peak intensity, as shown in Fig. 2(b).

Fig. 1. (color online) The typical AFM images of the samples before (a) and after (b) Si surface passivation.
Fig. 2. (color online) XPS spectra of germanium surface with silicon interlayer deposited at 390 °C with Si2H6 gas: (a) Si 2p, (b) Ge 3d.

The specific contact resistivities ( of Al/n+-Ge contacts with CTLM structures of the samples after ELA with and without Si passivation were measured to investigate the electrical properties of phosphorus-implanted Ge. The relatively low laser energy density was used to diminish the phosphorus diffusion depth.[19] CTLM structures consist of a circular metal pad separated from a larger metal pad by a ring of semiconductor material with inner radius of and gap spacing from to . Applying a bias voltage between the two pads for different gap spacings to obtain the resistance, we can plot the resistance versus gap spacing. Then, a linear fit was used to extract the sheet resistance and transfer length . The specific contact resistivity can be calculated as . Figure 3(a) shows the dependence of the contact resistance on the gap spacing of the samples after ELA with and without Si passivation. The extracted value of is about for the sample without Si passivation and for that with Si passivation. Compare with other reports, the value of with Si passivation is not the best result. However, under a very low ion implantation dose of about , the value of is decreased beyond one order of magnitude by combining Si passivation and laser annealing. It is a very considerable improvement and may provide a promising method to achieve extremely low specific contact resistivity of metal to n-Ge. In order to obtain a lower , more works, such as the optimization of ion implantation and annealing condition, will be needed.

Fig. 3. (color online) (a) Dependence of CTLM resistance on gap spacing for Al/n+-Ge contacts. The inset shows the CTLM schematic structure (top view). (b) Current–voltage characteristics of Al/n-Ge contacts with and without Si passivation.

It was reported that the specific contact resistivity of metal/n-Ge is related to the doping level and SBH.[27] The higher doping concentration and lower SBH could lead to a lower specific contact resistivity. As for the contact of Al/n-Ge with and without Si passivation, Schottky diodes were fabricated using n-type Ge(100) substrates with resistivities of . A shadow mask with circular patterns was fixed on the front side of the Ge substrate to form Al contacts with a diameter of 0.8 mm. And then, 300 nm thick Al was deposited on the backside of the Ge as the ohmic back contact. Figure 3(b) demonstrates the typical current density–voltage (JV) characteristics of Al/n-Ge Schottky diodes with and without Si passivation. This figure indicates that the reverse saturation current density of the diodes increases, and the rectifying ratio decreases by inserting the Si passivation layer. To extract the SBHs, the thermionic emission model for Schottky contact is employed to fit the current–voltage characteristics with the formula where is the barrier height for electrons. A is the contact area, and is the Richardson constant for n-Ge(100). The series resistances and the ideality factor n are considered as adjustable parameters. By fitting to the experimental data in Fig. 3(b), the SBHs ( and ideality factors (n) for Al/n-Ge and Al/Si passivated n-Ge contact are extracted to be 0.62 eV, 1.1 and 0.53 eV, 1.25, respectively. The barrier height for Al/n-Si is fitted to be about 0.5 eV in our work (not shown here). The reduction of SBH could be due to a larger depinning factor S = 0.27[28] of Si than that of Ge (S = 0.05).[9] Moreover, an important aspect of the Si-passivation is the potential presence of a high barrier at the Si–Ge interface. However, the Si thickness is just below 0.94 nm, Si on Ge shows a small difference in electron affinity and hence a very small electronic barrier. So the lower specific contact resistivity for the sample of Al/n+-Ge with Si passivation could be attributed to SBH’s reduction of the contact of Al/n-Ge after Si passivation.

The current–voltage characteristics of the Ge n+/p junctions formed by ELA with and without Si passivation are shown in Fig. 4. The inset shows the diode schematic with cross-sectional view. The reverse current density (at −1 V), ideality factor, and rectification ratio of the diode after ELA alone are about , 1.68, and 1.13×104, respectively, while the diode achieved by ELA plus Si passivation owns an obviously reduced leakage current density of , and an ideality factor of 1.06. Moreover, for the diode formed by ELA and Si passivation, a higher forward current in the series resistance limited regime is obtained, which is mainly attributed to the series resistance in the junction diode because of the reduced specific contact resistivity about Al/n+-Ge. In addition, the Si passivation layer was grown on the surface of P-implanted Ge at 390 °C–10 min, which can not only reduce the defect density but also passivate the diode’s surface as confirmed by the lower ideality factor (1.06). Both of them result in a lower reverse current density. As result, the diode achieved by ELA plus Si passivation shows a rectification ratio of about 6.5×106, which is two orders magnitude larger than that by ELA alone. There have been many reports[19,2933] on the fabrication of Ge n+/p junction diodes, in which high performance with high rectification ratio of about 107 was achieved. However, most of them required a high n-type ion implantation dose ( for high doping concentration and well-behaved ohmic contact. In this paper, a very high rectification ratio is obtained under a so low ion implantation dose (1014 cm−2) by combining with the epitaxial Si passivation.

Fig. 4. (color online) IV characteristics of Ge n+/p junctions formed by ELA with and without Si passivation. The inset shows the diode schematic with cross-sectional view.
4. Conclusions

An epitaxial Si passivation layer can unpin the Fermi level of the contact of Al/n-Ge to some extent and reduce the contact resistance. The specific contact resistivity of Al/n+-Ge is reduced from for the sample without Si passivation to for that with Si passivation. Furthermore, the fabricated Ge n+/p junction diode by ELA plus epitaxial Si passivation exhibits a decreased reverse current density of about , increased forward current density, a smaller ideality factor of 1.06, and a larger rectification ratio of about 6.5×106 compared to the diode achieved by ELA alone. The reduced specific contact resistivity of metal on n-doped germanium and well-behaved germanium n+/p diode are beneficial for the performance improvement of Ge nMOSFETs.

Reference
[1] Chui C O Ramanathan S Triplett B McIntyre P C Saraswat K C 2002 IEEE Electron Device Lett. 23 473
[2] Park J H Kuzum D Jung W S Saraswat K C 2011 t IEEE Electron Device Lett. 32 234
[3] Zhang R Huang P C Lin J C Taoka N Takenaka M Takagi S 2013 IEEE Trans. Electron Devices 60 927
[4] Morii K Iwasaki T Nakane R Takenaka M Takagi S 2010 IEEE Electron Device Lett. 31 1092
[5] Kuzum D Krishnamohan T Nainani A Sun Y Pianetta P A Wong H S P Saraswat K C 2011 IEEE Trans. Electron Devices 60 92
[6] Martens K Chui C O Brammertz G De Jaeger B Kuzum D Meuris M 2008 IEEE Trans. Electron Devices 55 547
[7] Shang H Frank M Gusev E P Chu J O Bedell S W Guarini K W Ieong M 2006 IBM J. Res. Develop 50 377
[8] Simoen E Satta A D’Amore A Janssens T Clarysse T Martens K De Jaeger B 2006 Mater. Sci. Semicond. Process 9 634
[9] Dimoulas A Tsipas P Sotiropoulos A 2006 Appl. Phys. Lett. 89 252110
[10] Brunco D P De Jaeger B Eneman G Mitard J Hellings G Satta A Terzieva V 2008 J. Electrochem. Soc. 155 H552
[11] Dupré C Ernst T Hartmann J M Andrieu F Barnes J P Rivallin P Faynot O 2007 J. Appl. Phys. 102 104505
[12] Kobayashi M Kinoshita A Saraswat K Wong P Nishi Y 2009 J. Appl. Phys. 105 023702
[13] Lieten R Afanas’ev V V Thoan N H Degroote S Walukiewicz W Borghs G 2011 J. Electrochem. Soc. 158 H358
[14] Martens K Rooyackers R 2011 Appl. Phys. Lett. 98 013504
[15] Sawano K Hoshi Y Kasahara K Yamane K Hamaya K Miyao M Shiraki Y 2010 Appl. Phys. Lett. 97 162108
[16] Firrincieli A Martens K Rooyackers R Vincent B 2011 Appl. Phys. Lett. 99 242104
[17] Huang W Lu C Yu J Wei J B Chen C W Wang J Y Xu J F Wang C Li C Chen S Y Liu C L Lai H K 2016 Chin. Phys. 25 057304
[18] Wang C Li C 2013 Appl. Phys. Exp. 6 106501
[19] Wang C Li C 2014 IEEE Trans. Electron Devices 61 3060
[20] Kuzum D Krishnamohan T Nainani A Sun Y Pianetta P A Wong H Saraswat K C 2009 IEEE IEDM Tech. Dig. 453
[21] Chui C O Kulig L Moran J Tsai W Saraswa K 2005 Appl. Phys. Lett. 87 091909
[22] Wundisch C Posselt M Schmidt B Heera V Schumann T Mucklich A Grotzschel R Skorupa W Clarysse T Simoen E Hortenbach H 2009 Appl. Phys. Lett. 95 252107
[23] Zhang R Li J Chen F Zhao Y 2016 IEEE Trans. Electron. Dev. 63 2665
[24] Yu B Wang Y Wang H Xiang Q Riccobene C Talwar S Lin M 1999 IEDM Tech. Dig. 509
[25] Gong X Han G Bai F Su S Guo P Yang Y Cheng R Zhang D 2013 IEEE Electron. Device. Lett. 34 339
[26] Gong X Han G Liu B Wang L Wang W Yang Y Kong E Su S Xue C Cheng B Yeo Y C 2013 IEEE Trans. Electron. Dev. 60 1640
[27] Firrincieli A Martens K Simoen E Claeys C Kittl J 2013 Microelectron. Eng. 106 129
[28] Cowley A Sze S 1965 J. Appl. Phys. 36 3212
[29] Thareja G Chopra S Adamas B Kim Y Moffatt S Saraswat K 2011 IEEE Electron Device Lett. 32 838
[30] Chen W Shie B Chin A 2011 IEEE Electron. Device Lett. 32 494
[31] Jamil M Mantey J Onyegam E Carpenter G Tutuc E Banerjee S 2011 IEEE Electron. Device Lett. 32 1203
[32] Bao Y Sun K Dhar N Gupta M C 2014 IEEE Photonics Tech. Lett. 26 1422
[33] Li J Cheng R Liu C Zhang P Lu J Chen K Zhang R Zhao Y 2017 Microelectron. Eng. 68 1